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catalog + bend.html: cuda-sim-ops-bin row gains SHAKE-RNG anchor note

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demo_ops in foxhop ecdsa repo now defaults --rng-mode shake (Fiat-Shamir
over op stream, ports eval_circuit::fiat_shamir_seed verbatim). Σ Toffoli
& avg Toffoli on stock ops.bin match upstream eval_circuit bit-for-bit:
15,999,651,264 / 1,773,011.000 across 141 batches (9024 shots) on a
3090. Our cuda-sim-ops-bin numbers now compare directly to upstream's
public Pareto scoreboard with no calibration constant.

Catalog row & bend.html row updated to document the shake/lfsr toggle
& the upstream-match guarantee. Throughput figure also refreshed to
1.27x at 141 batches (from prior 1.07x at 128 batches).
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russell@unturf.com 2026-06-06 09:58:54 -04:00
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10
examples/cuda-fanout/CATALOG.md
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@ -20,7 +20,7 @@ form-status column says `planned` until numbers exist.
| form | binary | hardware | speedup vs CPU | wire shape |
|-----------------------|-------------------------|----------|-------------------------------|-------------------------------------------------------------|
| `cuda-shake-fanout` | `shake256-fanout` | 3090 | 12x over host hashlib at 1M x 16 B inputs | `(cuda-shake-fanout (quote (hex …)) out-bytes)` + BSHK binary |
| `cuda-sim-ops-bin` | `ecdsa/cuda/demo_ops` | 3090 | 1.07x at 128 batches (8192 shots); crossover ~115 batches | `(cuda-sim-ops-bin "path/to/ops.bin" n-batches)` |
| `cuda-sim-ops-bin` | `ecdsa/cuda/demo_ops` | 3090 | 1.27x at 141 batches (9024 shots); crossover ~115 batches; **SHAKE-RNG mode** matches upstream Pareto: Σ Toffoli = 15,999,651,264 & avg Toffoli = 1,773,011.000 bit-identical to `eval_circuit` on same `ops.bin` | `(cuda-sim-ops-bin "path/to/ops.bin" n-batches)` — `demo_ops` defaults `--rng-mode shake` (Fiat-Shamir over op stream, matches upstream); `--rng-mode lfsr` keeps legacy xorshift for debug parity |
| `cuda-bignum-cgbn` | `cgbn-batch-worker` | 3090 | 1.28 Gops/s kernel mod-mul at n=1M (256-bit, ~256x GMP CPU); 9 ops total | `BCGB` binary: op_id + bitwidth + n + modulus + a + b |
| `cuda-secp256k1-batched-mul`| `secp256k1-batch-mul` | 3090 | v1 7.86 Mkeys/s @ n=1M; v3 (windowed-G w=4) **13.83 Mkeys/s @ n=1M** (1.76x v1; ~309x coincurve); Day-4 v4 (v3 ladder + Montgomery batch inv) regressed -12% vs v3 due to v2 serial-per-block walks; warp-scan Phase B/D refactor needed before v4 wins; daemon default flipped to `--window-w 4` | `BSCP` binary: scalars + base-point |
| `cuda-sim-axis-flip` | `ecdsa/cuda/demo_axis` | 3090 | 217 Mops/s @ K=32 M=4 (per-candidate parallel); 23.7x over per-shot N=4 at same M; LOSES to per-shot by 14% at full N=128 saturation | `(cuda-sim-axis (variant-paths …) n-shots)` |
@ -29,8 +29,12 @@ form-status column says `planned` until numbers exist.
`cuda-sim-ops-bin` numbers are humbling on purpose: kickmix is
conditional-op heavy & branch-divergent. This catalog exists so
we DO NOT pretend 1.07x is the ceiling — we find forms with real
SIMT-friendly shape & route work through them.
we DO NOT pretend 1.27x is the ceiling — we find forms with real
SIMT-friendly shape & route work through them. **As of
2026-06-06 our SHAKE-RNG mode anchors `demo_ops` measurements
directly against upstream's public Pareto scoreboard** — Σ Toffoli
& avg Toffoli are byte-identical to `eval_circuit` on the same
`ops.bin`, no calibration constant required.
## Why a form earns its slot

4
www/bend.html
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@ -134,8 +134,8 @@ make gpu-worker LUMBDA=asm # smallest footprint</code></pre>
<tr>
<td><code>cuda-sim-ops-bin</code></td>
<td>RTX 3090</td>
<td>1.07&times; at 128 batches; crossover ~115 batches</td>
<td><code>(cuda-sim-ops-bin "path/to/ops.bin" n-batches)</code></td>
<td>1.27&times; at 141 batches (9024 shots); crossover ~115 batches; <strong>SHAKE-RNG mode</strong> matches upstream Pareto bit-for-bit (&Sigma; Toffoli = 15,999,651,264, avg Toffoli = 1,773,011.000 on stock <code>ops.bin</code>)</td>
<td><code>(cuda-sim-ops-bin "path/to/ops.bin" n-batches)</code> &mdash; <code>demo_ops</code> defaults <code>--rng-mode shake</code> (Fiat-Shamir over op stream); <code>--rng-mode lfsr</code> keeps legacy xorshift for debug parity</td>
</tr>
<tr>
<td><code>cuda-sim-axis-flip</code></td>