From 7245f6b4654c94f7d9f87b23ef8764c2d024a6c3 Mon Sep 17 00:00:00 2001 From: "russell@unturf.com" Date: Sat, 6 Jun 2026 09:58:54 -0400 Subject: [PATCH] catalog + bend.html: cuda-sim-ops-bin row gains SHAKE-RNG anchor note MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit demo_ops in foxhop ecdsa repo now defaults --rng-mode shake (Fiat-Shamir over op stream, ports eval_circuit::fiat_shamir_seed verbatim). Σ Toffoli & avg Toffoli on stock ops.bin match upstream eval_circuit bit-for-bit: 15,999,651,264 / 1,773,011.000 across 141 batches (9024 shots) on a 3090. Our cuda-sim-ops-bin numbers now compare directly to upstream's public Pareto scoreboard with no calibration constant. Catalog row & bend.html row updated to document the shake/lfsr toggle & the upstream-match guarantee. Throughput figure also refreshed to 1.27x at 141 batches (from prior 1.07x at 128 batches). --- examples/cuda-fanout/CATALOG.md | 10 +++++++--- www/bend.html | 4 ++-- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/examples/cuda-fanout/CATALOG.md b/examples/cuda-fanout/CATALOG.md index 5572d81..e479081 100644 --- a/examples/cuda-fanout/CATALOG.md +++ b/examples/cuda-fanout/CATALOG.md @@ -20,7 +20,7 @@ form-status column says `planned` until numbers exist. | form | binary | hardware | speedup vs CPU | wire shape | |-----------------------|-------------------------|----------|-------------------------------|-------------------------------------------------------------| | `cuda-shake-fanout` | `shake256-fanout` | 3090 | 12x over host hashlib at 1M x 16 B inputs | `(cuda-shake-fanout (quote (hex …)) out-bytes)` + BSHK binary | -| `cuda-sim-ops-bin` | `ecdsa/cuda/demo_ops` | 3090 | 1.07x at 128 batches (8192 shots); crossover ~115 batches | `(cuda-sim-ops-bin "path/to/ops.bin" n-batches)` | +| `cuda-sim-ops-bin` | `ecdsa/cuda/demo_ops` | 3090 | 1.27x at 141 batches (9024 shots); crossover ~115 batches; **SHAKE-RNG mode** matches upstream Pareto: Σ Toffoli = 15,999,651,264 & avg Toffoli = 1,773,011.000 bit-identical to `eval_circuit` on same `ops.bin` | `(cuda-sim-ops-bin "path/to/ops.bin" n-batches)` — `demo_ops` defaults `--rng-mode shake` (Fiat-Shamir over op stream, matches upstream); `--rng-mode lfsr` keeps legacy xorshift for debug parity | | `cuda-bignum-cgbn` | `cgbn-batch-worker` | 3090 | 1.28 Gops/s kernel mod-mul at n=1M (256-bit, ~256x GMP CPU); 9 ops total | `BCGB` binary: op_id + bitwidth + n + modulus + a + b | | `cuda-secp256k1-batched-mul`| `secp256k1-batch-mul` | 3090 | v1 7.86 Mkeys/s @ n=1M; v3 (windowed-G w=4) **13.83 Mkeys/s @ n=1M** (1.76x v1; ~309x coincurve); Day-4 v4 (v3 ladder + Montgomery batch inv) regressed -12% vs v3 due to v2 serial-per-block walks; warp-scan Phase B/D refactor needed before v4 wins; daemon default flipped to `--window-w 4` | `BSCP` binary: scalars + base-point | | `cuda-sim-axis-flip` | `ecdsa/cuda/demo_axis` | 3090 | 217 Mops/s @ K=32 M=4 (per-candidate parallel); 23.7x over per-shot N=4 at same M; LOSES to per-shot by 14% at full N=128 saturation | `(cuda-sim-axis (variant-paths …) n-shots)` | @@ -29,8 +29,12 @@ form-status column says `planned` until numbers exist. `cuda-sim-ops-bin` numbers are humbling on purpose: kickmix is conditional-op heavy & branch-divergent. This catalog exists so -we DO NOT pretend 1.07x is the ceiling — we find forms with real -SIMT-friendly shape & route work through them. +we DO NOT pretend 1.27x is the ceiling — we find forms with real +SIMT-friendly shape & route work through them. **As of +2026-06-06 our SHAKE-RNG mode anchors `demo_ops` measurements +directly against upstream's public Pareto scoreboard** — Σ Toffoli +& avg Toffoli are byte-identical to `eval_circuit` on the same +`ops.bin`, no calibration constant required. ## Why a form earns its slot diff --git a/www/bend.html b/www/bend.html index 081a0ed..8dab879 100644 --- a/www/bend.html +++ b/www/bend.html @@ -134,8 +134,8 @@ make gpu-worker LUMBDA=asm # smallest footprint cuda-sim-ops-bin RTX 3090 - 1.07× at 128 batches; crossover ~115 batches - (cuda-sim-ops-bin "path/to/ops.bin" n-batches) + 1.27× at 141 batches (9024 shots); crossover ~115 batches; SHAKE-RNG mode matches upstream Pareto bit-for-bit (Σ Toffoli = 15,999,651,264, avg Toffoli = 1,773,011.000 on stock ops.bin) + (cuda-sim-ops-bin "path/to/ops.bin" n-batches)demo_ops defaults --rng-mode shake (Fiat-Shamir over op stream); --rng-mode lfsr keeps legacy xorshift for debug parity cuda-sim-axis-flip