russell@unturf.com
1665893321
29 new files publish factory infra (V2 autoscaler with live VRAM sampling + EWMA peak tracking, HUGE solo-dispatch, two-tier DLQ/rDLQ classifier + retry), general quantum circuit primitives (Cuccaro ripple-carry adder, Clifford gate library, Clifford tableau simulator, mod-arith family, dialog GCD reversible inverse, Karatsuba multiplier, Solinas fast reduction), and a TCRAUDT reducer harness. Originally developed in ~/git/www.foxhop.net/ecdsa/ for secp256k1 attack-surface research; published upstream as obligated by AGPLv3. Parametrization contract at factory/CONTRACT.md. Consumers export LUMBDA_REPO_DIR + LUMBDA_QUEUE_DIR + LUMBDA_BACKEND_CMD + LUMBDA_EMITTER_CMD then exec factory scripts. No fork-and-modify; single source of truth upstream. Integration tests gate 7 V2 defect classes that wedged a live factory on 2026-06-12 (skewed-demand starve, zero-floor reservation, multi-tier greedy, +-25%% damping, cold-start ramp, DLQ surge halve, post-damp CPU ceiling) + 28 DLQ classifier cases (auto-retry vs escalate partition) + bash -n syntax lint across every script. GPU backend stays in consumer trees; rationale in factory/GPU-BACKEND-NOTE.md. Bend wire protocol + gpu-worker.lsp already upstream at examples/cuda-fanout/. make factory-lint bash -n on every factory/*.sh make test-integration V2 reducer + DLQ classifier + syntax gate make sweep-doctrine TCRAUDT reducer gate (serial) make sweep-doctrine-parallel xargs -P fan-out Verified on neoblanka: factory-lint 12 scripts PASS; test-integration 14 V2 cases + 28 DLQ classifier cases + 12 syntax cases all PASS. |
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| .. | ||
| adder.lsp | ||
| gates.lsp | ||
| mod-arith.lsp | ||
| mod-inv-by-dialog-gcd-host.lsp | ||
| mod-inv-by-dialog-gcd.lsp | ||
| mod-inv-by.lsp | ||
| mod-karatsuba.lsp | ||
| mod-solinas.lsp | ||
| README.md | ||
| score.lsp | ||
| sim.lsp | ||
quantum/ — circuit emission primitives
Reversible-circuit emission primitives written in lumbda Scheme: Clifford gates, ripple-carry adder (Cuccaro), modular arithmetic, modular inverse strategies, Karatsuba multiplier, Clifford tableau simulator, circuit scoring. Originally developed at foxhop for secp256k1 attack-surface research; shared upstream under AGPLv3.
Layers
Core gates
gates.lsp— Clifford gate library:CX,CCX(Toffoli),X. Counts Toffoli + Clifford totals as side effect for scoring.
Arithmetic
adder.lsp— Cuccaro ripple-carry reversible n-bit adder. Width-parametric.mod-arith.lsp— modular add/sub/cmp/neg/mul/square under*field-prime*. Default unset; consumer binds (foxhop sets secp256k1p).mod-karatsuba.lsp— Karatsuba reversible multiplier for ⊕-bit widths. Width-parametric.
Modular inverse strategies
mod-inv-by.lsp— Bennett by-value-uncompute pattern (host classical1/x, then quantum verify-and-zero).mod-inv-by-dialog-gcd.lsp— Dialog GCD (binary extended Euclidean) reversible mod-inv. General algorithm, not field-specific.mod-inv-by-dialog-gcd-host.lsp— Host-assisted variant: classical GCD trace replayed as quantum dialog log.
Simulation + scoring
sim.lsp— Clifford tableau simulator. Verifies emitted circuits against expected truth tables.score.lsp— circuit metric collector. Tracks Toffoli + qubit + Clifford counts during emission.
Width discipline
Every primitive width-parametric — no hardcoded n = 256. Consumers bind *field-prime*, *width*, and optional flags (e.g. *mod-mul-use-karatsuba*).
Hard rule — bound every loop, bound every ancilla
*max-shots*caps shot counts in sim (default 64 for dev; raise only by explicit instruction).- Every
alloc!call site asserts width-cap at top of caller. Unbounded growth = host hard-freeze on neoblanka (proven 2026-06-11/12).
Lumbda tier compatibility
These primitives run under any lumbda tier (Python VM, C tree-walker + JIT, C + x86 JIT, pure x86 asm). Cross-tier portal validation: same .lsp on Python-tier + C-tier must produce byte-identical result S-expressions. Mismatch halts promotion.
License
AGPLv3.