russell@unturf.com
05fa922d42
Thin CUDA binary wrapping cub::DeviceRadixSort::SortKeys on a 64-bit
key stream. One op wired day-1 (0x01 sort-u64-asc); 0x02/0x03/0x04
slots reserved (desc, u32, key-value) for future builds.
Wire stays distinct from existing forms:
request: BSRT | u32 op_id | u32 n | u64[n]
response: BSRR | u32 status | u32 n | u64[n] sorted asc
Validated on 3090-ai.foxhop.net byte-identical to Python sorted() at
n ∈ {32, 1k, 100k, 1M, 10M}. Bench at sustained throughput:
n kernel_ms Gkeys/s
100,000 0.142 0.706
1,000,000 0.265 3.767
10,000,000 1.817 5.504
~4x over the published Titan baseline (1.4 Gkeys/s) at saturation,
matching CUB's expected Ampere scaling.
gpu-worker.lsp learns handle-binary-sort + BSRT magic dispatch +
maybe-register-daemon! for cuda-radix-sort (overridable via
RADIX_SORT_WORKER env). Both 3090-ai (:9091) & ai (:9092) workers
restarted; both log `ready cuda-radix-sort <- ./radix-sort`.
4090 (ai.foxhop.net) standalone --binary run OOMs on cudaMalloc when
all four daemons are co-resident (secp256k1 daemon parks ~24 GiB on
startup, leaving 47 MiB free). Pre-existing capacity constraint of
the ai host, not a form-G defect; tracked in form-G-progress.md.
CATALOG.md & www/bend.html live-forms table updated with measured
3090 numbers; Wave 1 surveyed row for G marked as promoted.
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265 lines
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<!doctype html>
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<html lang="en">
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<head>
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<meta charset="utf-8">
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<meta name="viewport" content="width=device-width,initial-scale=1">
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<title>bend — Lumbda's GPU dispatch primitive</title>
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<meta name="description" content="bend is Lumbda's GPU dispatch primitive: cost-routed local-vs-remote execution over a wire protocol, with a catalog of CUDA forms each backed by published speedup benchmarks.">
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<link rel="stylesheet" href="style.css">
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<script src="https://uncloseai.com/uncloseai.js" type="module"></script>
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</head>
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<body>
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<header>
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<h1 aria-label="lumbda."><a href="index.html" style="color:inherit;text-decoration:none">lumbda<span class="period" aria-hidden="true">.</span></a></h1>
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<img class="lambda-mark" src="lumbda-logo-green.png?v=2" alt="" aria-hidden="true">
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<p class="tagline">bend — dispatch to a GPU without rewriting your code</p>
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</header>
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<main>
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<section id="what">
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<p class="lead">
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<code>bend</code> is a Lumbda primitive that decides per call whether to evaluate locally or ship to a CUDA worker over our wire protocol. Tiny inputs stay local; heavy inputs bend to a worker that holds a warm CUDA context across requests. The decision uses a cost estimator on the argument shape, not the operation name.
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</p>
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</section>
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<section id="start">
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<h2>Start a GPU worker</h2>
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<pre><code># On any host with nvcc + a CUDA-capable GPU:
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make gpu-worker
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# → builds examples/cuda-fanout/shake256-fanout
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# → builds the C tier (~10× faster wire orchestration than Python)
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# → launches gpu-worker.lsp on port 9091
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# Override tier or port:
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make gpu-worker LUMBDA=python PORT=9001 # easier debugging
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make gpu-worker LUMBDA=asm # smallest footprint</code></pre>
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</section>
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<section id="call">
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<h2>Call it from any tier</h2>
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<pre><code>;; bend works on every tier — Python, C, asm — through the same
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;; tcp-* + portal primitives lumbda already ships.
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(load "examples/cuda-fanout/wire.lsp")
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(load "examples/cuda-fanout/bend.lsp")
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(load "examples/cuda-fanout/bend-macros.lsp") ; Python/C only — asm uses bend-call
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;; Tiny — cost below threshold, evaluates locally
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(bend (cuda-shake-fanout '("00" "01" "deadbeef") 32))
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;; Heavy — cost above threshold, ships to the GPU worker
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(bend (cuda-shake-fanout one-million-inputs 32))</code></pre>
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</section>
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<section id="protocol">
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<h2>Wire protocol</h2>
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<p>Two modes: <strong>S-expression text</strong> (the default) and <strong>binary</strong> (magic <code>BSHK</code> header + raw bytes). Binary mode bypasses S-expression parsing entirely.</p>
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<table>
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<thead><tr><th>workload</th><th>Py S-exp</th><th>Py binary</th><th>C S-exp</th><th>C binary</th></tr></thead>
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<tbody>
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<tr><td>100 × 16 B</td><td>3.43 ms</td><td>0.74 ms</td><td>0.40 ms</td><td><strong>0.15 ms</strong></td></tr>
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<tr><td>1k × 16 B</td><td>23.24 ms</td><td>0.76 ms</td><td>2.77 ms</td><td><strong>0.22 ms</strong></td></tr>
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<tr><td>10k × 16 B</td><td>218.82 ms</td><td>1.27 ms</td><td>CLIFF</td><td><strong>0.88 ms</strong></td></tr>
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<tr><td>100k × 16 B</td><td>2,219 ms</td><td>10.18 ms</td><td>CLIFF</td><td><strong>10.35 ms</strong></td></tr>
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<tr><td>1M × 16 B</td><td>23,811 ms</td><td>159 ms</td><td>CLIFF</td><td><strong>157 ms</strong></td></tr>
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</tbody>
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</table>
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<p>Binary mode wins by 30–200× over S-expression at scale; at 1 M × 16 B inputs C tier binary is 157 ms vs 23,811 ms for S-exp, and bend beats host hashlib by ~12×. The CUDA toolchain stays isolated to the leaf binary the worker spawns — no tier links libcudart; asm tier hosts workers through hand-written <code>pipe2 + fork + execve</code> syscalls.</p>
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</section>
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<section id="fleet">
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<h2>Fleet</h2>
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<p>bend runs on a 2-host LAN cluster; round-robin selection lives in <code>bend.lsp</code> via <code>*bend-workers*</code> + <code>BEND_WORKERS</code> env.</p>
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<table>
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<thead><tr><th>host</th><th>GPU</th><th>arch</th><th>port</th><th>coexists with</th></tr></thead>
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<tbody>
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<tr><td><code>3090-ai.foxhop.net</code></td><td>RTX 3090 (24 GB)</td><td>sm_86</td><td>9091</td><td>idle</td></tr>
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<tr><td><code>ai.foxhop.net</code></td><td>RTX 4090 (24 GB)</td><td>sm_89</td><td>9092</td><td>qwen LLM (llama.cpp) on GPU</td></tr>
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</tbody>
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</table>
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<p>The 4090 box shares its GPU with a qwen LLM — bend kernels burn SMs for milliseconds then release; qwen keeps its weights resident; 24 GB VRAM holds both. Cluster aggregate (sequential round-robin dispatcher): 1.6× at 200 × <code>n=1k</code> mod-mul, 1.2× at 6 × <code>n=100k</code>; an async dispatcher unlocks the remaining 2× headroom.</p>
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</section>
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<section id="catalog">
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<h2>Form catalog</h2>
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<p>A form earns a slot here only after we have published a benchmark or measured one on our hardware. "I think this would be fast" does not earn a slot — the form-status column says <code>planned</code> until numbers exist.</p>
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<h3>Status legend</h3>
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<ul>
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<li><code>live</code> — binary built, worker dispatches it, numbers recorded on our hardware</li>
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<li><code>surveyed</code> — published benchmark cited, prototype binary not yet wrapped</li>
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</ul>
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<h3>Live forms</h3>
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<table>
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<thead><tr><th>form</th><th>hardware</th><th>throughput</th><th>wire shape</th></tr></thead>
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<tbody>
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<tr>
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<td><code>cuda-shake-fanout</code></td>
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<td>RTX 3090</td>
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<td>12× host hashlib at 1 M × 16 B inputs</td>
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<td><code>(cuda-shake-fanout '(hex ...) out-bytes)</code> + <code>BSHK</code> binary</td>
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</tr>
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<tr>
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<td><code>cuda-sim-ops-bin</code></td>
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<td>RTX 3090</td>
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<td>1.07× at 128 batches; crossover ~115 batches</td>
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<td><code>(cuda-sim-ops-bin "path/to/ops.bin" n-batches)</code></td>
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</tr>
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<tr>
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<td><code>cuda-sim-axis-flip</code></td>
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<td>RTX 3090</td>
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<td>217 Mops/s @ K=32 M=4 (many-candidates × few-shots)</td>
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<td><code>(cuda-sim-axis (variant-paths ...) n-shots)</code></td>
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</tr>
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<tr>
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<td><code>cuda-bignum-cgbn</code></td>
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<td>RTX 3090</td>
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<td>1.28 Gops/s kernel mod-mul @ n=1M (256-bit, ~256× GMP CPU); 9 ops</td>
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<td><code>BCGB</code> binary: op_id + bitwidth + n + modulus + a + b</td>
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</tr>
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<tr>
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<td><code>cuda-secp256k1-batched-mul</code></td>
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<td>RTX 3090</td>
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<td>13.83 Mkeys/s @ n=1M (~309× coincurve CPU; windowed-G ladder w=4)</td>
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<td><code>BSCP</code> binary: scalars + base-point → <code>BSCR</code> points</td>
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</tr>
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<tr>
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<td><code>cuda-radix-sort</code></td>
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<td>RTX 3090</td>
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<td>5.50 Gkeys/s @ n=10M (kernel 1.82 ms); 3.77 Gkeys/s @ n=1M; CUB DeviceRadixSort u64 ascending</td>
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<td><code>BSRT</code> binary: op_id + n + u64[n] → <code>BSRR</code> sorted u64[n]</td>
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</tr>
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</tbody>
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</table>
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<h3>Surveyed forms (Wave 1)</h3>
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<table>
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<thead><tr><th>form</th><th>throughput</th><th>hardware</th><th>ref</th></tr></thead>
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<tbody>
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<tr><td><code>cuda-secp256k1-batched-mul</code></td><td>6.5 Gkeys/s VanitySearch RTX 4090; 8.6 Gkeys/s RTX 5090; 2.65 Gkeys/s RTX 3080</td><td>(promoted — see Live)</td><td><a href="https://arxiv.org/pdf/2501.03245">gECC</a> · <a href="https://github.com/FixedPaul/VanitySearch-Bitcrack">Bitcrack</a></td></tr>
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<tr><td><code>cuda-bignum-cgbn</code></td><td>100×+ on dense mul vs Xeon-20c + GMP + OpenMP</td><td>V100</td><td><a href="https://github.com/NVlabs/CGBN">NVlabs CGBN</a> · <a href="https://arxiv.org/pdf/2405.14642">midsize-int</a></td></tr>
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<tr><td><code>cuda-rho-pollard-walk</code></td><td>87.7 M ops/sec for ECCp79</td><td>RTX 2070 Super</td><td><a href="https://github.com/atlomak/CUDA-rho-pollard">atlomak</a> · <a href="https://github.com/oritwoen/kangaroo">oritwoen</a></td></tr>
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<tr><td><code>cuda-clifford-stabilizer</code></td><td>186× over Stim (CPU SOTA) on equivalence-checking</td><td>STABSim</td><td><a href="https://arxiv.org/abs/2507.03092">STABSim</a> · <a href="https://arxiv.org/abs/2505.03307">Qimax</a></td></tr>
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<tr><td><code>cuda-bernstein-yang-inv</code></td><td>3–10× per inversion over Fermat on CPU; novel territory on GPU</td><td>—</td><td><a href="https://eprint.iacr.org/2019/266">safegcd</a> · <a href="https://eprint.iacr.org/2024/644">Jumping</a></td></tr>
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<tr><td><code>cuda-ntt-poly</code></td><td>up to 123× over CPU; 21× on RTX 3070</td><td>RTX 3070</td><td><a href="https://arxiv.org/pdf/2405.11353">NTTSuite</a> · <a href="https://eprint.iacr.org/2021/124.pdf">FHE NTT</a></td></tr>
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<tr><td><code>cuda-radix-sort</code></td><td>1.4 G keys/sec; 20–50× over CPU merge sort; 257× vs Xeon Phi for scan</td><td>(promoted — see Live)</td><td><a href="https://github.com/NVIDIA/cub">CUB</a> · <a href="https://gpuopen.com/learn/boosting_gpu_radix_sort/">Onesweep</a></td></tr>
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</tbody>
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</table>
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<h3>Surveyed forms (Wave 2)</h3>
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<p>Sorted by reported speedup descending.</p>
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<table>
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<thead><tr><th>form</th><th>throughput</th><th>hardware</th><th>ref</th></tr></thead>
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<tbody>
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<tr><td><code>cuda-minhash-weighted</code></td><td>600–1000× vs numpy+MKL</td><td>Titan X vs Xeon E5-1650</td><td><a href="https://github.com/src-d/minhashcuda">src-d/minhashcuda</a></td></tr>
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<tr><td><code>cuda-cuckoo-filter</code></td><td>378× insert, 258× delete</td><td>A100</td><td><a href="https://arxiv.org/pdf/2603.15486">arXiv:2603.15486</a></td></tr>
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<tr><td><code>cuda-aes-ctr-chacha20</code></td><td>211–400 GB/s</td><td>single GPU</td><td><a href="https://dl.acm.org/doi/fullHtml/10.1145/3605573.3605620">AsyncGBP</a></td></tr>
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<tr><td><code>cuda-suffix-array-skew</code></td><td>30–242× vs CPU SA-IS</td><td>Tesla K20</td><td><a href="https://escholarship.org/content/qt83r7w305/qt83r7w305_noSplash_842edf05a7f4e9ecfb1a477bdf9318d3.pdf">Liu/Luo</a></td></tr>
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<tr><td><code>cuda-kdtree-build</code></td><td>30–242× build, 1.6–200× kNN</td><td>RTX (RT cores)</td><td><a href="http://www.kunzhou.net/2008/kdtree.pdf">Zhou et al.</a></td></tr>
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<tr><td><code>cuda-sat-paraFROST-elim</code></td><td>93× peak, 48× avg variable elim</td><td>NVIDIA + Kissat baseline</td><td><a href="https://github.com/muhos/ParaFROST">ParaFROST</a></td></tr>
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<tr><td><code>cuda-aho-corasick-pfac</code></td><td>~50–100× IDS pkt-inspect</td><td>GTX-class</td><td><a href="https://www.cise.ufl.edu/~sahni/papers/multipatternGPU.pdf">PFAC</a></td></tr>
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<tr><td><code>cuda-dilithium-pqsig</code></td><td>57.7× keygen+sign+verify vs single CPU thread</td><td>RTX 3090 Ti</td><td><a href="https://eprint.iacr.org/2024/1365.pdf">IACR 2024/1365</a></td></tr>
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<tr><td><code>cuda-mc-options-pricing</code></td><td>25–152×</td><td>Tesla C1060 / modern</td><td><a href="https://developer.nvidia.com/gpugems/gpugems2/part-vi-simulation-and-numerical-algorithms/chapter-45-options-pricing-gpu">GPU Gems Ch.45</a></td></tr>
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<tr><td><code>cuda-cuFFT-batched-1D</code></td><td>8–32× vs MKL; tcFFT 1.1–3.2× vs cuFFT</td><td>V100 / A100</td><td><a href="https://arxiv.org/pdf/2104.11471">tcFFT</a></td></tr>
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<tr><td><code>cuda-blake3-tree</code></td><td>~5–20× tree mode</td><td>Blaze-3 CUDA</td><td><a href="https://github.com/Blaze-3/BLAKE3-gpu">Blaze-3</a></td></tr>
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<tr><td><code>cuda-bloom-filter-modern</code></td><td>~6× CPU; 3.4 B inserts/s</td><td>B200 / Perlmutter</td><td><a href="https://arxiv.org/pdf/2512.15595">arXiv:2512.15595</a></td></tr>
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<tr><td><code>cuda-gemm-batched-FP8</code></td><td>4.8× FP8 vs A100; 716 TFLOPS H100</td><td>H100 SXM</td><td><a href="https://developer.nvidia.com/blog/new-cublas-12-0-features-and-matrix-multiplication-performance-on-nvidia-hopper-gpus/">cuBLAS 12.0</a></td></tr>
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<tr><td><code>cuda-batched-matrix-inverse</code></td><td>4.3–16.8× vs MAGMA</td><td>P100</td><td><a href="https://www.superfri.org/index.php/superfri/article/download/178/598">Superfri 2018</a></td></tr>
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<tr><td><code>cuda-hash-join-radix</code></td><td>4 B tuples/s single; 1.8 T tuples/s on 1024 A100</td><td>A100 cluster</td><td><a href="https://adms-conf.org/2021-camera-ready/gao_adms21.pdf">ADMS-21</a></td></tr>
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<tr><td><code>cuda-kmer-count</code></td><td>4–6× vs KMC2</td><td>RapidGKC, Gerbil</td><td><a href="https://www.researchgate.net/publication/382499333_RapidGKC_GPU-Accelerated_K-Mer_Counting">RapidGKC</a></td></tr>
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<tr><td><code>cuda-cgraph-traversal</code></td><td>38 B TEPS</td><td>DGX2</td><td><a href="https://medium.com/rapids-ai/rapids-cugraph-multi-gpu-pagerank-363aed1a2503">cuGraph</a></td></tr>
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<tr><td><code>cuda-triangle-count-TRUST</code></td><td>~1 T TEPS</td><td>multi-A100</td><td><a href="https://arxiv.org/pdf/2103.08053">TRUST</a></td></tr>
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<tr><td><code>cuda-ldpc-bp-decoder</code></td><td>10 Gbps with early-termination</td><td>GPGPU</td><td><a href="https://www.mdpi.com/2079-9292/11/21/3447">MDPI Electronics 2022</a></td></tr>
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<tr><td><code>cuda-nvcomp-zstd</code></td><td>2.2× zstd; 1.4× LZ4; 1.9× snappy</td><td>H100 / A100</td><td><a href="https://docs.nvidia.com/cuda/nvcomp/">nvCOMP</a></td></tr>
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</tbody>
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</table>
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<h3>Surveyed forms (Wave 3)</h3>
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<table>
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<thead><tr><th>form</th><th>throughput</th><th>hardware</th><th>ref</th></tr></thead>
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<tbody>
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<tr><td><code>cuda-fluidx3d-lbm</code></td><td>100–200× vs ANSYS Fluent; 8,799 MLUPS single A100</td><td>A100</td><td><a href="https://github.com/ProjectPhysX/FluidX3D">FluidX3D</a></td></tr>
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<tr><td><code>cuda-mfcc-spectral</code></td><td>~97× CPU MFCC; STFT ~75× via cuSignal</td><td>GTX 580 / RTX 30-series</td><td><a href="https://developer.nvidia.com/blog/accelerated-signal-processing-with-cusignal/">cuSignal</a></td></tr>
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<tr><td><code>cuda-batched-lp-simplex</code></td><td>95× over CPLEX; 5× over GLPK</td><td>GTX 980-class</td><td><a href="https://arxiv.org/pdf/1802.08557">arXiv 1802.08557</a></td></tr>
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<tr><td><code>cuda-betweenness-centrality-weighted</code></td><td>30–150× warp-centric weighted BC</td><td>GTX onwards</td><td><a href="https://arxiv.org/pdf/1701.05975">arXiv 1701.05975</a></td></tr>
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<tr><td><code>cuda-cudasift-orb-ransac</code></td><td>~60× SIFT CPU→GPU; ORB 11.3×</td><td>GTX 1060+</td><td><a href="https://github.com/Celebrandil/CudaSift">CudaSift</a></td></tr>
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<tr><td><code>cuda-cudasw-gasal2</code></td><td>CUDASW++4.0 16.2×; 5.71 TCUPS on H100</td><td>H100</td><td><a href="https://bmcbioinformatics.biomedcentral.com/articles/10.1186/s12859-024-05965-6">CUDASW++4.0</a></td></tr>
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<tr><td><code>cuda-loopy-bp-mrf</code></td><td>45× over CPU LBP for stereo MRF</td><td>GTX 280+</td><td><a href="https://arxiv.org/pdf/2509.22337">arXiv 2509.22337</a></td></tr>
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<tr><td><code>cuda-sgm-stereo</code></td><td>42 fps @ 640×480, 128 disparities</td><td>Tegra X1 / discrete</td><td><a href="https://arxiv.org/abs/1610.04121">arXiv 1610.04121</a></td></tr>
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<tr><td><code>cuda-hungarian-lap</code></td><td>10–50×; 400 M-variable LAP in ~13 s</td><td>NVIDIA GPU</td><td><a href="https://www.sciencedirect.com/science/article/abs/pii/S016781911630045X">ScienceDirect</a></td></tr>
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<tr><td><code>cuda-msm-bls12-381</code></td><td>27.86× over Pippenger AVX baseline</td><td>A100 / RTX 4090</td><td><a href="https://tches.iacr.org/index.php/TCHES/article/download/12061/11906/13930">SimdMSM TCHES</a></td></tr>
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<tr><td><code>cuda-pdwt-lifting</code></td><td>15.9× over best optimized CPU DWT</td><td>GTX / Tesla</td><td><a href="https://github.com/pierrepaleo/PDWT">PDWT</a></td></tr>
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<tr><td><code>cuda-tensornet-contract</code></td><td>8–20× vs CuPy; tensor QR ~100× vs Xeon</td><td>A100</td><td><a href="https://docs.nvidia.com/cuda/cuquantum/latest/cutensornet/index.html">cuTensorNet</a></td></tr>
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<tr><td><code>cuda-ega-gpu-aggregation</code></td><td>6.45–29.12× multi-pass; group-by 19.4×</td><td>NVIDIA GPU</td><td><a href="https://www.vldb.org/pvldb/vol17/p644-siddiqui.pdf">VLDB Top-k EGA</a></td></tr>
|
||
<tr><td><code>cuda-bicgstab-ilu-spmv</code></td><td>SpTRSV 10.7×; BiCGSTAB 3.2× vs cuSPARSE</td><td>V100 / MI210</td><td><a href="https://arxiv.org/pdf/2508.04917">arXiv 2508.04917</a></td></tr>
|
||
<tr><td><code>cuda-icicle-snark-groth16</code></td><td>fastest Groth16 today; NTT 91% of prover</td><td>RTX 4090 / A100</td><td><a href="https://www.ingonyama.com/post/icicle-snark-the-fastest-groth16-implementation-in-the-world">ICICLE-Snark</a></td></tr>
|
||
</tbody>
|
||
</table>
|
||
|
||
<h3>Surveyed forms (Wave 4)</h3>
|
||
<table>
|
||
<thead><tr><th>form</th><th>throughput</th><th>hardware</th><th>ref</th></tr></thead>
|
||
<tbody>
|
||
<tr><td><code>cuda-kalman-batched</code></td><td>1386× for 5000-component measurements</td><td>various</td><td><a href="https://github.com/inganesa/CUDAkalmanFilter">CUDAkalmanFilter</a></td></tr>
|
||
<tr><td><code>cuda-g6k-tensor-sieve</code></td><td>1230× vs G6K CPU sieve at dim 120; SVP record dim 180 on 4 Turing GPUs</td><td>4 Turing</td><td><a href="https://eprint.iacr.org/2021/141.pdf">Ducas/Stevens/van Woerden EC 2021</a></td></tr>
|
||
<tr><td><code>cuda-zkspeed-sumcheck-hyperplonk</code></td><td>801× geomean over CPU; sumcheck 8.4 s → 9.5 ms</td><td>full-chip accelerator</td><td><a href="https://arxiv.org/pdf/2504.06211">zkSpeed HPCA 2025</a></td></tr>
|
||
<tr><td><code>cuda-kyber-batched-ntt</code></td><td>~451× batched (B=65k); HI-Kyber 6.47× over prior GPU SOTA</td><td>RTX 3080</td><td><a href="https://eprint.iacr.org/2023/1194.pdf">HI-Kyber</a></td></tr>
|
||
<tr><td><code>cuda-ironman-ote</code></td><td>237× OT throughput vs full-thread CPU</td><td>near-memory variant</td><td><a href="https://arxiv.org/pdf/2507.16391">Ironman arXiv 2507.16391</a></td></tr>
|
||
<tr><td><code>cuda-cudss-cholesky</code></td><td>>100× vs QDLDL; 20× vs CHOLMOD factor</td><td>NVIDIA</td><td><a href="https://developer.nvidia.com/blog/solving-large-scale-linear-sparse-problems-with-nvidia-cudss/">NVIDIA cuDSS</a></td></tr>
|
||
<tr><td><code>cuda-particle-filter</code></td><td>~150× absolute (5000 particles @ 170 Hz)</td><td>GPGPU</td><td><a href="https://asp-eurasipjournals.springeropen.com/articles/10.1186/1687-6180-2013-148">EURASIP J ASP 2013</a></td></tr>
|
||
<tr><td><code>cuda-rk-stiff-chemkin</code></td><td>126× vs single-core; 25× vs 6-core for hydrogen RKCK 524k ODEs</td><td>GPGPU</td><td><a href="https://arxiv.org/pdf/1309.2710">Niemeyer & Sung</a></td></tr>
|
||
<tr><td><code>cuda-fem-assembly-jit</code></td><td>87× assembly vs serial CPU; 126× peak numerical integration</td><td>GPGPU</td><td><a href="https://arxiv.org/pdf/1802.03433">Mironov et al.</a></td></tr>
|
||
<tr><td><code>cuda-cufalcon-sign</code></td><td>201k sig/s Falcon-512 on A100; verify 2.72M sig/s, 29.5× vs AVX2</td><td>A100</td><td><a href="https://eprint.iacr.org/2025/249.pdf">cuFalcon eprint 2025/249</a></td></tr>
|
||
<tr><td><code>cuda-cudahull-3d</code></td><td>30–40× over Qhull CPU</td><td>NVIDIA</td><td><a href="https://www.sciencedirect.com/science/article/abs/pii/S0097849312000350">CudaHull CAG 2012</a></td></tr>
|
||
<tr><td><code>cuda-fastplay-garbled</code></td><td>35–40× over serial garbling on GPU cluster</td><td>GPU cluster</td><td><a href="https://eprint.iacr.org/2011/097">Fastplay eprint 2011/097</a></td></tr>
|
||
<tr><td><code>cuda-air-fri</code></td><td>~22.8× avg end-to-end ZK speedup; FRI commitment</td><td>GPGPU</td><td><a href="https://sacworkshop.org/SAC25/preproceedings/sac2025-1-paper8.pdf">Air-FRI SAC 2025</a></td></tr>
|
||
<tr><td><code>cuda-rabin-fingerprint</code></td><td>16× over single-thread CPU; 40 Gbps absolute</td><td>GTX 780 (HARENS)</td><td><a href="https://ipapapa.github.io/Files/cloudcom2016.pdf">HARENS CloudCom 2016</a></td></tr>
|
||
<tr><td><code>cuda-gdel3d</code></td><td>10× over CGAL 3D Delaunay; 70× Voronoi/jump-flood at 10M points</td><td>NVIDIA</td><td><a href="https://www.comp.nus.edu.sg/~tants/gdel3d_files/gDel3D.pdf">gDel3D I3D 2014</a></td></tr>
|
||
<tr><td><code>cuda-perasure-crs</code></td><td>10× vs multithread Jerasure; 10 GB/s on GTX780 absolute</td><td>GTX 780</td><td><a href="https://ieeexplore.ieee.org/document/7248360/">PErasure IEEE Cluster 2015</a></td></tr>
|
||
<tr><td><code>cuda-piranha-mpc</code></td><td>4× vs CryptGPU on VGG16 private inference; full 3/4-party stacks single-GPU</td><td>single GPU</td><td><a href="https://www.usenix.org/system/files/sec22-watson.pdf">Piranha USENIX Sec 2022</a></td></tr>
|
||
<tr><td><code>cuda-scamp-matrix-profile</code></td><td>quintillion pairwise comparisons / day (absolute)</td><td>GPGPU</td><td><a href="https://github.com/zpzim/SCAMP">SCAMP</a></td></tr>
|
||
<tr><td><code>cuda-cudtw-subseq</code></td><td>2–3 orders of magnitude over UCR-Suite CPU; soft-DTW up to 5000×</td><td>Volta</td><td><a href="https://link.springer.com/chapter/10.1007/978-3-030-57675-2_37">cuDTW++ Euro-Par 2020</a></td></tr>
|
||
<tr><td><code>cuda-terachem-dft</code></td><td>1–2 orders of magnitude over CPU; 8–50× vs GAMESS on 256-core cluster</td><td>4× Tesla</td><td><a href="https://en.wikipedia.org/wiki/TeraChem">TeraChem</a></td></tr>
|
||
</tbody>
|
||
</table>
|
||
<p><strong>Wave 4 filter-outs</strong>: MAFFT MSA (11–20×, surpassed), RAxML likelihood (32× kernel only, ~3–10× end-to-end), AmgX CG (3–4× vs AmgX baseline), BVH Karras LBVH (2–3× over prior GPU LBVH), LDPC decode (40–160 Mbps, not ≥10× over modern SIMD CPU), mesh decimation (application-dependent), discrete Gaussian sampler (single-digit % gains; fold into Kyber NTT). Revisit when the published number changes.</p>
|
||
|
||
<h3>Why a form earns its slot</h3>
|
||
<p>A form is GPU-worth-it when at least one of:</p>
|
||
<ol>
|
||
<li><strong>Embarrassingly parallel.</strong> N independent items, no cross-item dependency.</li>
|
||
<li><strong>Dense, branch-free inner loop.</strong> Same operation on every element.</li>
|
||
<li><strong>Reduction-friendly.</strong> Tree-reduce / prefix-sum / parallel-scan patterns.</li>
|
||
<li><strong>Big batch amortizes fixed kernel overhead.</strong></li>
|
||
</ol>
|
||
<p>When none of these hold, find a different decomposition: parallelize on a different axis, or stay on CPU & fan out across fleet hosts.</p>
|
||
</section>
|
||
|
||
<section id="source">
|
||
<h2>Source & specs</h2>
|
||
<p>
|
||
<a href="https://git.unturf.com/engineering/unturf/lumbda/-/blob/master/examples/cuda-fanout/">examples/cuda-fanout/</a> — wire contract, daemon protocol, bench data, per-tier integration.<br>
|
||
<a href="https://git.unturf.com/engineering/unturf/lumbda/-/blob/master/examples/cuda-fanout/CATALOG.md">CATALOG.md</a> — canonical source for form metadata.
|
||
</p>
|
||
</section>
|
||
|
||
</main>
|
||
|
||
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|
||
<a href="index.html">lumbda.com</a>
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<a href="https://git.unturf.com/engineering/unturf/lumbda">source</a>
|
||
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|
||
<a href="lumbda-whitepaper.html">whitepaper (HTML)</a>
|
||
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|
||
<a href="lumbda-whitepaper.pdf">whitepaper (PDF)</a>
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<a href="https://unturf.com">unturf.com</a>
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