Added a write-to-string-shim.lsp for asm tier (which lacks the
native builtin); asm launch script pre-defines *argv* + loads the
shim so wire.lsp's wire-send finds a write-to-string definition.
Python/C tiers keep the native builtin — the shim is opt-in.
Bench extended with two huge workloads (100k × 16 B, 1M × 16 B).
Real numbers, 3090-ai, daemon warm, both ends localhost:
workload Python C tier C win
small (3 × 16 B) 1.16 ms 0.14 ms 8.3×
small (100 × 16 B) 3.39 ms 0.42 ms 8.1×
medium (1000 × 16 B) 23.26 ms 2.67 ms 8.7×
huge (100k × 16 B) 2,220 ms STALL n/a
huge (1M × 16 B) 24,338 ms STALL n/a
THE FINDING: at huge sizes, the bottleneck is the S-expression
text wire format, not the CUDA kernel. shake256-fanout finishes
1M × 16B in ~47 ms; the Python worker takes 24 SECONDS end-to-end
because wire.lsp's recv-exact accumulates chunks via string-append
in a loop — O(n²) at multi-MB payload sizes. C tier fails outright.
The right fix is binary wire framing between client + worker,
parallel to the binary portal format the daemon + leaf already use.
That's a separate piece of work; today's Web page edit calls it out
honestly so visitors know when bend is the right tool.
asm tier worker hosting still has process-management quirks
(doesn't survive nohup detachment in this environment); bench
ships with --skip-asm by default in this run.
russell@unturf.com
373c8ea0d3