From f80371af724ec67fc72051491acca1e5a4f0efb6 Mon Sep 17 00:00:00 2001 From: "russell@unturf.com" Date: Sun, 7 Jun 2026 09:42:46 -0400 Subject: [PATCH] bend.html: real foxhop URL + inline coordinator pattern Two link fixes: - Drop dead /gpu-mesh link. That wiki RST exists in our private repo but our remarkbox host has not landed it under a public URL yet. Describe coordinator pattern inline so a reader sees the shape without following an unreachable href. - /ecdsa link was also wrong. Real published page lives at our remarkbox UUID slug. Updated to actual URL. Closed-source reminder for future drift: foxhop research code is NOT open source. Never link to a script path under foxhop-book; if a concept needs explaining, inline a description instead of pointing at our private repo. --- www/bend.html | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/www/bend.html b/www/bend.html index 70e84c4..d7d0784 100644 --- a/www/bend.html +++ b/www/bend.html @@ -87,7 +87,7 @@ make gpu-worker LUMBDA=python PORT=8321 # second worker, off-BEND port< cammy.foxhop.netTesla P40 (24 GB)sm_618320active — 3-node mesh (Pascal) -

3-node mesh active. 3090 + 4090 + P40 all serve bend workloads on port 8320 (BEND mnemonic). Round-robin or explicit selection via (bend-set-workers! '(("3090-ai.foxhop.net" . 8320) ("ai.foxhop.net" . 8320) ("cammy.foxhop.net" . 8320))). A cost-routed coordinator pattern lives at foxhop.net/gpu-mesh — greedy bin-pack by predicted cost per host (factor 1.00 / 0.51 / 1.84 for 3090 / 4090 / P40); one worker thread per node fires concurrently against our wire protocol.

+

3-node mesh active. 3090 + 4090 + P40 all serve bend workloads on port 8320 (BEND mnemonic). Round-robin or explicit selection via (bend-set-workers! '(("3090-ai.foxhop.net" . 8320) ("ai.foxhop.net" . 8320) ("cammy.foxhop.net" . 8320))). Cost-routed coordinator pattern: greedy bin-pack candidates by predicted cost; per-host wall factor 1.00 / 0.51 / 1.84 (3090 / 4090 / P40 — Pascal lags but contributes a third concurrent stream); one worker thread per node fires concurrently against our wire protocol. Each node serializes its own queue (workers do not multiplex requests cleanly inside one CUDA context).

@@ -143,7 +143,7 @@ make gpu-worker LUMBDA=python PORT=8321 # second worker, off-BEND port< cuda-sim-ops-bin RTX 3090 - 1.27× at 141 batches (9024 shots); crossover ~115 batches; SHAKE-RNG mode matches upstream Pareto bit-for-bit (Σ Toffoli = 15,999,651,264, avg Toffoli = 1,773,011.000 on stock ops.bin). Kernel wall scales linearly with Σ Toffoli across circuit variants — foxhop ecdsa lever sweep at p=251 (n+1=9 secp256k1-toy) over 6 lumbda-emitted ops.bin variants ran 9.83× wall reduction Fermat-schoolbook → refined-Solinas, 261.4 ms → 26.6 ms / batch at 1024 shots; matches 6.95× Σ Toffoli ratio + parallel Clifford drop. No scheduler surprise: pick any QECCOPS1 circuit, predict GPU wall from a cheap CPU op-counter. + 1.27× at 141 batches (9024 shots); crossover ~115 batches; SHAKE-RNG mode matches upstream Pareto bit-for-bit (Σ Toffoli = 15,999,651,264, avg Toffoli = 1,773,011.000 on stock ops.bin). Kernel wall scales linearly with Σ Toffoli across circuit variants — foxhop secp256k1 lever sweep at p=251 (n+1=9 secp256k1-toy) over 6 lumbda-emitted ops.bin variants ran 9.83× wall reduction Fermat-schoolbook → refined-Solinas, 261.4 ms → 26.6 ms / batch at 1024 shots; matches 6.95× Σ Toffoli ratio + parallel Clifford drop. No scheduler surprise: pick any QECCOPS1 circuit, predict GPU wall from a cheap CPU op-counter. (cuda-sim-ops-bin "path/to/ops.bin" n-batches) — demo_ops defaults --rng-mode shake (Fiat-Shamir over op stream); --rng-mode lfsr keeps legacy xorshift for debug parity