form E day-1 — Montgomery batch-inv 0x0A regressed 300x vs 0x05, parked
Built op_id 0x0A (mod-inv-batch) on cgbn-batch-worker.cu using
Montgomery's 1 inv + 3(N-1) muls trick. Byte-identity holds at
every N (n in {32, 1k, 10k, 100k}, all 10 ops × 4 N = 40 PASS).
Kernel-ms 0x05 (per-instance, current LIVE op) vs 0x0A on a 3090:
N 0x05 0x0A ratio
10k 0.52 ms 78.34 ms 0.01x
100k 2.54 ms 762.28 ms 0.003x
1M 21.10 ms 7763.45 ms 0.0003x
The spec premise — "sequential modmuls cheap, parallel mod-invs
expensive" — INVERTS on a 3090. CGBN's parallel 0x05 saturates 82
SMs × 128 in-flight instances at ~47 Mops/s; one TPI=8 lockstep
instance walking 3N sequential modmuls in Phase 1+3 is
latency-bound, not throughput-bound. The Montgomery trick only
wins on hardware where one inv is dramatically more expensive
than 3N muls; on a 3090 the parallelism budget makes the
inversions cheap.
HARD-RULE TRIPPED (>= 5x win at n=100k required). Hard rule honored:
- no master daemon restart
- no CATALOG.md / bend.html promotion
- production daemons on :9091 / :9092 untouched (still serve 9-op binary)
Code + test changes & progress doc commit here as research artifact.
The 10-op binary builds clean & is byte-correct; just slow. Future
day-2 pass should land per-block parallel prefix scan (Kogge-Stone
or Sklansky) for Phase 1+3 — same refactor pattern Form A Day-4
needs to make v4 beat v3.
This commit is contained in:
parent
05fa922d42
commit
d74953723f
3 changed files with 263 additions and 13 deletions
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@ -6,7 +6,8 @@
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*
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* Op coverage: 0x01 mod-add, 0x02 mod-sub, 0x03 mod-mul, 0x04 mod-sqr,
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* 0x05 mod-inv, 0x06 mod-exp, 0x07 mod-reduce,
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* 0x08 add-no-mod, 0x09 mul-no-mod.
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* 0x08 add-no-mod, 0x09 mul-no-mod,
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* 0x0A mod-inv-batch (Montgomery's trick: 1 inv + 3(N-1) muls).
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* Bitwidth: 256 only (day-1 freeze).
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*
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* Wire (BCGB input):
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@ -23,9 +24,20 @@
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* u32 status (0 = ok)
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* u32 n_instances
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* u8[n_instances * width_out/8] result
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* width_out = bitwidth for 0x01..0x08
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* width_out = bitwidth for 0x01..0x08, 0x0A
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* width_out = 2 * bitwidth for 0x09 mul-no-mod
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*
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* Op 0x0A wire shape (mod-inv-batch — same layout as 0x05 mod-inv):
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* 16 B header + 32 B modulus + n*32 B xs → 12 B header + n*32 B inverses
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* Algorithm: Montgomery's batched-inversion trick
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* phase 1: t[0] = x[0]; t[i] = t[i-1] * x[i] mod m (N-1 muls)
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* phase 2: u = t[n-1]^-1 mod m (1 inv)
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* phase 3: for i in n-1..1: (2(N-1) muls)
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* result[i] = u * t[i-1] mod m
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* u = u * x[i] mod m
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* result[0] = u
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* Cost: 1 modular inverse + 3(N-1) modular multiplications.
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*
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* Build:
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* make cgbn-batch-worker CGBN_INC=/path/to/CGBN/include
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*
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@ -75,6 +87,7 @@ enum {
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OP_MOD_REDUCE = 0x07,
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OP_ADD_NO_MOD = 0x08,
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OP_MUL_NO_MOD = 0x09,
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OP_MOD_INV_BATCH = 0x0A,
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};
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/* ── Kernels: one __global__ per op, 256-bit, batched ──────────────── */
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@ -214,6 +227,79 @@ __global__ void mod_inv_256_kernel(
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cgbn_store(env, &result[instance], bn_r);
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}
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/* mod-inv-batch (op 0x0A): Montgomery's batched-inversion trick.
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*
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* Day-1 sequential shape: launch with TPI=8 threads (1 CGBN instance), all
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* 8 threads cooperate as a single CGBN cgbn_t inside cooperative-group ops.
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* The kernel itself iterates the n inputs in a sequential loop.
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*
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* Win comes not from intra-phase parallelism (Phase 1/3 are sequential) but
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* from replacing N independent modular inverses (each ~hundreds of binary
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* GCD steps under cgbn_modular_inverse) with N-1 simple modular multiplies
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* plus 1 inverse. At n=100k a single thread doing 100k modmuls at CGBN's
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* kernel rate (~ns each) still finishes well under the time N parallel
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* mod-invs take at 42 Mops/s (~2.4 ms).
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*
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* Buffers:
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* t[] scratch prefix-products workspace (n * 32 B)
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* result[] final inverses
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*/
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__global__ void mod_inv_batch_256_kernel(
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mem_256_t *result,
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mem_256_t *t,
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mem_256_t *xs,
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mem_256_t *modulus,
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uint32_t n_instances)
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{
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/* Single cooperating CGBN instance — TPI threads in lockstep. */
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uint32_t tid = blockIdx.x * blockDim.x + threadIdx.x;
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if (tid >= TPI) return;
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context_t ctx(cgbn_no_checks);
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env_256_t env(ctx);
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env_256_t::cgbn_t bn_x, bn_m, bn_acc, bn_u, bn_prev_t;
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typename env_256_t::cgbn_wide_t bn_wide;
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cgbn_load(env, bn_m, modulus);
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/* Phase 1: prefix products.
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* t[0] = x[0]
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* t[i] = t[i-1] * x[i] mod m, for i = 1 .. n-1
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*/
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cgbn_load(env, bn_acc, &xs[0]);
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cgbn_store(env, &t[0], bn_acc);
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for (uint32_t i = 1; i < n_instances; i++) {
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cgbn_load(env, bn_x, &xs[i]);
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cgbn_mul_wide(env, bn_wide, bn_acc, bn_x);
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cgbn_rem_wide(env, bn_acc, bn_wide, bn_m);
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cgbn_store(env, &t[i], bn_acc);
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}
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/* Phase 2: single modular inverse on t[n-1]. */
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bool ok = cgbn_modular_inverse(env, bn_u, bn_acc, bn_m);
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if (!ok) {
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cgbn_set_ui32(env, bn_u, 0);
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}
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/* Phase 3: reverse sweep.
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* for i = n-1 .. 1:
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* result[i] = u * t[i-1] mod m
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* u = u * x[i] mod m
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* result[0] = u
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*/
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for (int64_t i = (int64_t)n_instances - 1; i >= 1; i--) {
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cgbn_load(env, bn_prev_t, &t[i - 1]);
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cgbn_mul_wide(env, bn_wide, bn_u, bn_prev_t);
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cgbn_rem_wide(env, bn_acc, bn_wide, bn_m);
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cgbn_store(env, &result[i], bn_acc);
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cgbn_load(env, bn_x, &xs[i]);
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cgbn_mul_wide(env, bn_wide, bn_u, bn_x);
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cgbn_rem_wide(env, bn_u, bn_wide, bn_m);
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}
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cgbn_store(env, &result[0], bn_u);
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}
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__global__ void mod_exp_256_kernel(
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mem_256_t *result,
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mem_256_t *a,
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@ -377,6 +463,7 @@ static enum op_family classify_op(uint32_t op_id) {
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case OP_MOD_SQR:
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case OP_MOD_INV:
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case OP_MOD_REDUCE:
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case OP_MOD_INV_BATCH:
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return FAMILY_UN_MOD;
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case OP_ADD_NO_MOD:
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case OP_MUL_NO_MOD:
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@ -448,6 +535,7 @@ static int process_one_bin(const char *in_path, const char *out_path) {
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/* Allocate device buffers. */
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mem_256_t *d_modulus = NULL, *d_a = NULL, *d_b = NULL, *d_r = NULL;
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mem_256_t *d_t = NULL; /* scratch for OP_MOD_INV_BATCH phase 1. */
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mem_512_t *d_r_wide = NULL;
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if (modulus_bytes) {
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@ -468,12 +556,20 @@ static int process_one_bin(const char *in_path, const char *out_path) {
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} else {
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CUDA_CHECK(cudaMalloc(&d_r, (size_t)n * sizeof(mem_256_t)));
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}
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if (op_id == OP_MOD_INV_BATCH) {
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CUDA_CHECK(cudaMalloc(&d_t, (size_t)n * sizeof(mem_256_t)));
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}
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/* Launch geometry: TPI threads per instance, 128 instances per block. */
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uint32_t threads_per_block = 128 * TPI;
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uint32_t total_threads = n * TPI;
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uint32_t blocks = (total_threads + threads_per_block - 1) / threads_per_block;
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/* OP_MOD_INV_BATCH runs as a single cooperating CGBN instance
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* (TPI threads, sequential phases inside the kernel). */
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uint32_t batch_inv_threads = TPI;
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uint32_t batch_inv_blocks = 1;
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struct timespec t0, t1;
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clock_gettime(CLOCK_MONOTONIC, &t0);
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switch (op_id) {
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@ -504,6 +600,10 @@ static int process_one_bin(const char *in_path, const char *out_path) {
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case OP_MUL_NO_MOD:
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mul_no_mod_256_kernel<<<blocks, threads_per_block>>>(d_r_wide, d_a, d_b, n);
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break;
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case OP_MOD_INV_BATCH:
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mod_inv_batch_256_kernel<<<batch_inv_blocks, batch_inv_threads>>>(
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d_r, d_t, d_a, d_modulus, n);
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break;
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}
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CUDA_CHECK(cudaDeviceSynchronize());
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clock_gettime(CLOCK_MONOTONIC, &t1);
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@ -519,6 +619,7 @@ static int process_one_bin(const char *in_path, const char *out_path) {
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if (d_a) cudaFree(d_a);
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if (d_b) cudaFree(d_b);
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if (d_r) cudaFree(d_r);
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if (d_t) cudaFree(d_t);
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if (d_r_wide) cudaFree(d_r_wide);
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free(in_buf); return -1;
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}
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@ -537,6 +638,7 @@ static int process_one_bin(const char *in_path, const char *out_path) {
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if (d_a) cudaFree(d_a);
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if (d_b) cudaFree(d_b);
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if (d_r) cudaFree(d_r);
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if (d_t) cudaFree(d_t);
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if (d_r_wide) cudaFree(d_r_wide);
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free(in_buf);
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139
examples/cuda-fanout/plans/form-E-progress.md
Normal file
139
examples/cuda-fanout/plans/form-E-progress.md
Normal file
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@ -0,0 +1,139 @@
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# Form E — `cuda-bernstein-yang-inv` progress doc
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Status: **DAY-1 SEQUENTIAL DESIGN LOSES — DO NOT PROMOTE**.
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Decision point reached 2026-06-05. Halt rule from spec (HARD RULES,
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"If 0x0A fails to outperform 0x05 by ≥ 5x at n=100k, STOP") tripped.
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Implementation builds clean, byte-identity holds across all N, but
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the kernel-time win does not exist. Document landed before any commit.
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## What we built
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Added op_id `0x0A mod-inv-batch` to `cgbn-batch-worker.cu` as a
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Montgomery batched-inversion (the textbook 1 inv + 3(N-1) muls
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trick). Shape: same BCGB wire payload as 0x05 (16 B header + 32 B
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modulus + n × 32 B xs → 12 B header + n × 32 B inverses). New kernel
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`mod_inv_batch_256_kernel` runs as **one cooperating CGBN instance
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(TPI=8 threads, 1 block)** sweeping the n inputs sequentially through:
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1. forward sweep building prefix products t[i] = t[i-1] * x[i] mod m
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2. one `cgbn_modular_inverse` on t[n-1]
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3. reverse sweep yielding result[i] from u and t[i-1]
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Allocates an n-sized scratch buffer d_t on device. Op classified as
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FAMILY_UN_MOD so the payload-size validator already accepted it.
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Test harness `test_cgbn_known_answers.py` gained driver
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`driver_mod_inv_batch` reusing the existing unary-with-modulus
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template, `ensure_invertible=True`, gmpy2 reference. Default N sweep
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extended to include 100k.
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## Validation result — byte-identity PASSES
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Built on 3090-ai (sm_86) clean, no warnings. Built on ai (sm_89)
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clean, no warnings.
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Test on 3090-ai:
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```
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PASS mod-inv-batch secp256k1 prime n=32
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PASS mod-inv-batch secp256k1 prime n=1000
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PASS mod-inv-batch secp256k1 prime n=10000
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PASS mod-inv-batch secp256k1 prime n=100000
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ALL PASS
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```
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All four N values produce result bytes identical to gmpy2's per-element
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`invert(x[i], m)`. The algorithm is correct.
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## Benchmark result — 0x0A LOSES TO 0x05
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Bench harness `/tmp/bench_inv_batch.py` parses `kernel=X.XXms` from
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worker stderr, single-shot per N, secp256k1 prime modulus.
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3090-ai (RTX 3090):
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| N | 0x05 mod-inv kernel-ms | 0x0A inv-batch kernel-ms | ratio (0x05 / 0x0A) |
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|-----------|-----------------------:|--------------------------:|--------------------:|
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| 10,000 | 0.520 | 78.340 | 0.01× |
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| 100,000 | 2.540 | 762.280 | 0.00× |
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| 1,000,000 | 21.100 | 7763.450 | 0.00× |
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Spec required ≥ 5× speedup at n=100k. We measure **~300× slowdown**.
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## Why the day-1 design lost
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The spec's premise was that 0x05 mod-inv runs at "42 Mops/s" and that
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a single-thread sequential walk doing only modmuls would beat N
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parallel mod-invs. Both halves of that premise turn out wrong on a
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3090 with our existing parallel kernel:
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- The existing parallel 0x05 hits ~**40 Gops/s** at n=1M (1e6 / 21.1
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ms ≈ 47 Mops/s — wait, that matches the spec, but 0x0A at n=1M
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costs 7.7 s for 3(N-1) ≈ 3M muls = 0.39 Mmuls/s on one CGBN
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instance). A single TPI=8 lockstep instance running sequentially is
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~5 orders of magnitude slower than the SM-saturated kernel at the
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parallel modmul rate. We bought one inversion (saved ~21 ms / 1M
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inversions = ~21 ns each) at the cost of doing 3(N-1) muls
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sequentially through one 8-thread group that has no
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pipeline / overlap.
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- Phase 1 / Phase 3 each carry a strict data dependency chain
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(t[i] depends on t[i-1]; reverse sweep on u and t[i-1]). With
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zero parallelism inside the chain, we are bound by latency × n,
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not throughput. 3 sequential modmuls × n at single-instance
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latency dominates.
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- The existing 0x05 path **already amortises** through CGBN's
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parallel cooperative groups; it is not the per-inversion cost
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that hurts, it is N independent inversions getting pipelined
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across 82 SMs × 128 in-flight instances.
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The arithmetic in the spec ("single thread 100k modmuls at ~0.005 µs
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each = ~500 µs") assumed CGBN modmul on a single instance retires
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at the device modmul rate. It does not — each mul-wide + rem-wide is
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hundreds of warp-cycles of cooperative work bound by chain latency,
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not by the kernel's aggregate throughput.
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## What would actually win
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Two pivots survive analysis:
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1. **Per-block prefix scan.** Split the n inputs into B blocks of
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~256 each. Within each block, a warp does a parallel scan of
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modmuls (log(B) depth instead of B). Cross-block reduction is
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sequential but only B steps. At n=100k with B=256, depth becomes
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~log2(256) + 391 ≈ 399 sequential modmul-equivalents instead of
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100k. Phase 3 mirrors. This is the next implementation; spec
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already flagged it as the fall-back ("If you want to chase more,
|
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do per-block prefix scan next").
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2. **True Bernstein-Yang safegcd CUDA kernel** — the original
|
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catalog target. Per-instance parallel inversion at ~3-10× over
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Fermat. Multi-day effort but novel territory & beats the existing
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0x05 path on per-inversion cost.
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Day-1 trick (single sequential instance) carried zero leverage. Day-2
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or later under approach (1) is the next ticket. We do not commit
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0x0A as live — it would regress every consumer.
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## Files touched (uncommitted, local)
|
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- `~/git/lumbda/examples/cuda-fanout/cgbn-batch-worker.cu`
|
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— kernel + dispatch + family classification + cleanup
|
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- `~/git/lumbda/examples/cuda-fanout/test_cgbn_known_answers.py`
|
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— driver + OPS registry entry + default-N sweep extended to 100k
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- `~/git/lumbda/examples/cuda-fanout/plans/form-E-progress.md` — this doc
|
||||
|
||||
CATALOG.md & bend.html are NOT updated. Worker binaries on 3090-ai &
|
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ai.foxhop.net rebuilt with the new op but **the live `:9091` /
|
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`:9092` daemons remained pointed at the prior binary** until restart;
|
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we did not restart them, so production traffic still uses the 9-op
|
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build. Restart would expose the new op without harming existing ops
|
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(0x01..0x09 untouched), but per the halt rule we do not promote.
|
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|
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## Recommended next step
|
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|
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Open form-E Day-2 ticket: rewrite `mod_inv_batch_256_kernel` as
|
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per-block parallel scan (warp-shuffle reduce within block of 256
|
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or 128 instances, cross-block sequential cleanup). Expected to clear
|
||||
the 5× threshold at n=100k since Phase 1/3 chain depth drops from
|
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100,000 to ~log2(B) + (100k / B). Reuse the same wire shape and
|
||||
test harness — both are correct. Only the kernel changes.
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|
|
@ -14,6 +14,7 @@ Op coverage (all 9 ops in plan §2 dispatcher table):
|
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0x07 mod-reduce a mod m
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0x08 add-no-mod a + b (truncated to 256 bits)
|
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0x09 mul-no-mod a * b (full 512-bit product)
|
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0x0A mod-inv-batch Montgomery's batched-inversion trick (N inverses)
|
||||
|
||||
Usage:
|
||||
python3 test_cgbn_known_answers.py [worker-path] ; default: ./cgbn-batch-worker
|
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|
|
@ -41,6 +42,7 @@ OP_MOD_EXP = 0x06
|
|||
OP_MOD_REDUCE = 0x07
|
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OP_ADD_NO_MOD = 0x08
|
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OP_MUL_NO_MOD = 0x09
|
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OP_MOD_INV_BATCH = 0x0A
|
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|
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try:
|
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from gmpy2 import mpz, f_mod, invert, powmod
|
||||
|
|
@ -268,6 +270,12 @@ def driver_mod_inv(worker, n, modulus, label):
|
|||
return test_unary_mod(worker, OP_MOD_INV, "mod-inv", h_inv, n, modulus, label,
|
||||
ensure_invertible=True)
|
||||
|
||||
def driver_mod_inv_batch(worker, n, modulus, label):
|
||||
"""Montgomery's batched inversion (op 0x0A). Same wire shape as 0x05
|
||||
but result[i] must still equal x[i]^-1 mod m byte-for-byte."""
|
||||
return test_unary_mod(worker, OP_MOD_INV_BATCH, "mod-inv-batch", h_inv,
|
||||
n, modulus, label, ensure_invertible=True)
|
||||
|
||||
def driver_mod_exp(worker, n, modulus, label):
|
||||
return test_mod_exp_small(worker, n, modulus, label)
|
||||
|
||||
|
|
@ -282,15 +290,16 @@ def driver_mul_no_mod(worker, n, modulus, label):
|
|||
|
||||
|
||||
OPS = [
|
||||
("mod-add", driver_mod_add, True),
|
||||
("mod-sub", driver_mod_sub, True),
|
||||
("mod-mul", driver_mod_mul, True),
|
||||
("mod-sqr", driver_mod_sqr, True),
|
||||
("mod-inv", driver_mod_inv, True),
|
||||
("mod-exp", driver_mod_exp, True),
|
||||
("mod-reduce", driver_mod_reduce, True),
|
||||
("add-no-mod", driver_add_no_mod, False),
|
||||
("mul-no-mod", driver_mul_no_mod, False),
|
||||
("mod-add", driver_mod_add, True),
|
||||
("mod-sub", driver_mod_sub, True),
|
||||
("mod-mul", driver_mod_mul, True),
|
||||
("mod-sqr", driver_mod_sqr, True),
|
||||
("mod-inv", driver_mod_inv, True),
|
||||
("mod-exp", driver_mod_exp, True),
|
||||
("mod-reduce", driver_mod_reduce, True),
|
||||
("add-no-mod", driver_add_no_mod, False),
|
||||
("mul-no-mod", driver_mul_no_mod, False),
|
||||
("mod-inv-batch", driver_mod_inv_batch, True),
|
||||
]
|
||||
|
||||
|
||||
|
|
@ -298,7 +307,7 @@ def main():
|
|||
ap = argparse.ArgumentParser()
|
||||
ap.add_argument("worker", nargs="?", default="./cgbn-batch-worker")
|
||||
ap.add_argument("--n", type=int, default=None,
|
||||
help="single N override (default: sweep 32, 1k, 10k)")
|
||||
help="single N override (default: sweep 32, 1k, 10k, 100k)")
|
||||
ap.add_argument("--op", default=None,
|
||||
help="restrict to one op name (e.g. mod-mul)")
|
||||
args = ap.parse_args()
|
||||
|
|
@ -306,7 +315,7 @@ def main():
|
|||
print(f"worker not found: {args.worker}")
|
||||
sys.exit(1)
|
||||
|
||||
ns = [args.n] if args.n else [32, 1_000, 10_000]
|
||||
ns = [args.n] if args.n else [32, 1_000, 10_000, 100_000]
|
||||
moduli = [
|
||||
(SECP256K1_P, "secp256k1 prime"),
|
||||
]
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue