diff --git a/examples/cuda-fanout/CATALOG.md b/examples/cuda-fanout/CATALOG.md index ab47b24..ab48b87 100644 --- a/examples/cuda-fanout/CATALOG.md +++ b/examples/cuda-fanout/CATALOG.md @@ -188,19 +188,32 @@ when there's no superposition; AG reduces to exactly what sim_gpu.cu already does, at one bit per qubit per shot. The 1.07x cuda-sim-ops-bin ceiling traces to memory-bandwidth on -per-shot striped state, not algorithm. Two pivots queued; opt 1 landed 2026-06-05 with a key correction: +per-shot striped state, not algorithm. Both pivots landed 2026-06-05; bandwidth-bound diagnosis confirmed FALSE +on the kickmix circuit. Empirical results below; see RESULTS docs for +detail. - **axis-flip refactor of sim_gpu.cu** — DONE (Form D option 1, commit foxhop 1f7ac9d). 217 Mops/s @ K=32 M=4; 23.7x over - per-shot N=4 at same M. CORRECTION: bandwidth-bound diagnosis - was WRONG — both kernels saturate at ~220-250 Mops/s. Axis - flip's win is **occupancy-amortization** at small M, not + per-shot N=4 at same M. Both kernels saturate at ~220-250 Mops/s. + Axis flip's win is **occupancy-amortization** at small M, not bandwidth redistribution. Right tool for many-candidates × few-shots search-loop early-screen pattern. - - **ops.bin packing** — 56 -> 16 bytes per op halves global-memory - traffic (Form D option 3). Still in flight. Given the bandwidth - diagnosis flipped, may not deliver expected gain — letting - the agent report empirical numbers. + + - **ops.bin packing (QECCOPS2)** — DONE (Form D option 3, commit + foxhop 90484ca). 1.07x kernel speedup, 2.33x on-disk shrink + (716 MB → 307 MB). The 3.5x projection was WRONG because + ops_loader.c already narrowed u64 → u32 on load, so in-VRAM Op + was already 28 B not 56 B; max realistic VRAM reduction 28→24 B + = 1.17x best case. Per-shot state traffic (qubits + bits per + thread) is ~85x larger than the op stream and dominates kernel + bandwidth. Storage win still useful for fleet rsync; compute + win small. + + Both pivots converged on the same diagnosis: **the 3090 is + compute-saturated at ~250 Mops/s on the kickmix circuit, not + bandwidth-saturated.** Real next macro-lever: multi-GPU fan-out + (3090-ai + ai.foxhop.net 4090, each hitting its own ceiling in + parallel — see task #30). Form D as originally scoped (AG tableau for our circuit) is **parked**. STABSim-class wins remain valid for QEC / surface-code diff --git a/www/bend.html b/www/bend.html index 0397c0a..4ddeb5a 100644 --- a/www/bend.html +++ b/www/bend.html @@ -99,11 +99,12 @@ make gpu-worker LUMBDA=asm # smallest footprint

Form D structural finding — 2026-06-05

cuda-clifford-stabilizer as originally scoped does not apply to our point-add circuit. Build agent measured Toffoli fraction 13.87% (well under the 40% threshold), then noticed the circuit contains no Hadamard or S gates — only X / CX / CCX / CZ / CCZ / SWAP / R / HMR / Z / NEG. State never leaves the computational basis. Aaronson-Gottesman tableau compression buys nothing when superposition does not exist; it reduces to exactly what sim_gpu.cu already does, at one bit per qubit per shot.

The cuda-sim-ops-bin 1.07× ceiling traces to memory-bandwidth on per-shot striped state, not algorithm choice. STABSim-class wins remain valid for QEC / surface-code workloads where H + S exist; that's a future workload, not point-add today.

-

Two replacement directions in flight:

+

Both replacement directions landed 2026-06-05; the bandwidth-bound diagnosis they were chasing turned out FALSE for our circuit.

+

Both pivots converged on the same diagnosis: the 3090 is compute-saturated at ~250 Mops/s on the kickmix circuit, not bandwidth-saturated. Real next macro-lever: multi-GPU fan-out across our fleet.

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