bend.html: streamline — collapse Wave 1 detail into table, tighten prose
Wave 1's 7 detailed entries (3 paragraphs each) become one compact 4-column table matching Waves 2/3/4. Drops ~30 lines without losing any reference URL or speedup number. Protocol section: 2 paragraphs → 1. Fleet section: 4 paragraphs + table → 2 paragraphs + same table. Net change: 284 → ~244 lines while preserving every citation and every measurement. Reads more like a reference doc.
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@ -65,13 +65,12 @@ make gpu-worker LUMBDA=asm # smallest footprint</code></pre>
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<tr><td>1M × 16 B</td><td>23,811 ms</td><td>159 ms</td><td>CLIFF</td><td><strong>157 ms</strong></td></tr>
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</tbody>
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</table>
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<p>Binary mode wins by 30–200× over S-expression mode at scale. At 1 M × 16 B inputs, C tier binary is 157 ms end-to-end versus 23,811 ms for the S-exp path. At that scale bend beats host hashlib by ~12×.</p>
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<p>The CUDA toolchain stays isolated to the leaf binary the worker spawns. No tier links libcudart; no tier requires nvcc at build time. Asm tier hosts workers through hand-written <code>pipe2 + fork + execve</code> syscalls.</p>
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<p>Binary mode wins by 30–200× over S-expression at scale; at 1 M × 16 B inputs C tier binary is 157 ms vs 23,811 ms for S-exp, and bend beats host hashlib by ~12×. The CUDA toolchain stays isolated to the leaf binary the worker spawns — no tier links libcudart; asm tier hosts workers through hand-written <code>pipe2 + fork + execve</code> syscalls.</p>
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</section>
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<section id="fleet">
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<h2>Fleet</h2>
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<p>bend runs on a 2-host LAN cluster. Round-robin selection lives in <code>bend.lsp</code> via <code>*bend-workers*</code> & the <code>BEND_WORKERS</code> environment variable.</p>
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<p>bend runs on a 2-host LAN cluster; round-robin selection lives in <code>bend.lsp</code> via <code>*bend-workers*</code> + <code>BEND_WORKERS</code> env.</p>
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<table>
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<thead><tr><th>host</th><th>GPU</th><th>arch</th><th>port</th><th>coexists with</th></tr></thead>
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<tbody>
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@ -79,8 +78,7 @@ make gpu-worker LUMBDA=asm # smallest footprint</code></pre>
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<tr><td><code>ai.foxhop.net</code></td><td>RTX 4090 (24 GB)</td><td>sm_89</td><td>9092</td><td>qwen LLM (llama.cpp) on GPU</td></tr>
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</tbody>
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</table>
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<p>The 4090 box shares its GPU with a qwen LLM. Bend kernels fit alongside because secp256k1 / CGBN workloads burn SMs for milliseconds at a time then release; qwen keeps its weights resident, bend allocates transient VRAM per call. 24 GB VRAM holds both.</p>
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<p>Cluster aggregate (round-robin fan-out, sequential dispatcher): 1.6× at 200 × <code>n=1k</code> CGBN mod-mul, 1.2× at 6 × <code>n=100k</code>. Cap is client-side serialization; an async dispatcher unlocks the remaining 2× headroom. Workers themselves never block each other.</p>
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<p>The 4090 box shares its GPU with a qwen LLM — bend kernels burn SMs for milliseconds then release; qwen keeps its weights resident; 24 GB VRAM holds both. Cluster aggregate (sequential round-robin dispatcher): 1.6× at 200 × <code>n=1k</code> mod-mul, 1.2× at 6 × <code>n=100k</code>; an async dispatcher unlocks the remaining 2× headroom.</p>
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</section>
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<section id="catalog">
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@ -131,41 +129,18 @@ make gpu-worker LUMBDA=asm # smallest footprint</code></pre>
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</table>
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<h3>Surveyed forms (Wave 1)</h3>
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<h4>A. <code>cuda-secp256k1-batched-mul</code> — batched secp256k1 scalar / point ops</h4>
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<p><strong>Reference numbers:</strong> gECC 4.94× on unknown-point mul, 5.56× on ECDSA verify vs CPU. VanitySearch forks hit 6.5 Gkeys/s on RTX 4090, 8.6 Gkeys/s on RTX 5090, 2.65 Gkeys/s on RTX 3080.</p>
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<p><strong>Wire:</strong> <code>(secp-mul-batch (scalars . blob<N×32B>) (base-point . blob<64B>))</code> → <code>(points . blob<N×64B>)</code></p>
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<p><strong>Refs:</strong> <a href="https://arxiv.org/pdf/2501.03245">gECC paper</a> · <a href="https://github.com/JeanLucPons/VanitySearch">VanitySearch</a> · <a href="https://github.com/FixedPaul/VanitySearch-Bitcrack">VanitySearch-Bitcrack</a></p>
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<h4>B. <code>cuda-bignum-cgbn</code> — 256-bit modular arithmetic primitives</h4>
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<p><strong>Reference numbers:</strong> 100×+ on dense mul vs Xeon-20c + GMP + OpenMP on V100.</p>
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<p><strong>Wire:</strong> <code>(cgbn-batch (op . mod-mul|mod-inv|mod-add) (modulus . blob<32B>) (a . blob<N×32B>) (b . blob<N×32B>))</code> → <code>blob<N×32B></code></p>
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<p><strong>Refs:</strong> <a href="https://github.com/NVlabs/CGBN">NVlabs CGBN</a> · <a href="https://arxiv.org/pdf/2405.14642">midsize-int benchmarks</a></p>
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<h4>C. <code>cuda-rho-pollard-walk</code> — Pollard rho / kangaroo walks</h4>
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<p><strong>Reference numbers:</strong> 87.7 M ops/sec on RTX 2070 Super for ECCp79. Original CUDA Pollard paper reports > 7.2 M points/sec at 256 threads on older hardware.</p>
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<p><strong>Wire:</strong> <code>(rho-walk-batch (start-points . blob<W×64B>) (steps . N) (distinguished-mask . blob<32B>))</code> → <code>(distinguished . blob<K×96B>)</code></p>
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<p><strong>Refs:</strong> <a href="https://github.com/atlomak/CUDA-rho-pollard">atlomak/CUDA-rho-pollard</a> · <a href="https://github.com/oritwoen/kangaroo">oritwoen/kangaroo</a></p>
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<h4>D. <code>cuda-clifford-stabilizer</code> — tableau stabilizer simulator (Stim-on-GPU)</h4>
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<p><strong>Reference numbers:</strong> 186× over Stim (CPU SOTA) on equivalence-checking.</p>
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<p><strong>Wire:</strong> <code>(stab-sim-batch (n-qubits . k) (circuit . blob) (n-shots . S))</code> → <code>(samples . blob<S×ceil(k/8)>)</code></p>
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<p><strong>Refs:</strong> <a href="https://arxiv.org/abs/2507.03092">STABSim</a> · <a href="https://arxiv.org/abs/2505.03307">Qimax</a> · <a href="https://arxiv.org/pdf/2603.14641">equivalence-checking</a></p>
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<h4>E. <code>cuda-bernstein-yang-inv</code> — batched modular inverse (safegcd)</h4>
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<p><strong>Reference numbers:</strong> 3–10× per inversion over Fermat on CPU. No published dedicated CUDA implementation; Standalone Bernstein-Yang-on-CUDA holds novel territory.</p>
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<p><strong>Wire:</strong> <code>(modinv-batch (modulus . blob<32B>) (xs . blob<N×32B>))</code> → <code>blob<N×32B></code></p>
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<p><strong>Refs:</strong> <a href="https://eprint.iacr.org/2019/266">safegcd</a> · <a href="https://eprint.iacr.org/2024/644">Jumping for Bernstein-Yang</a></p>
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<h4>F. <code>cuda-ntt-poly</code> — Number Theoretic Transform</h4>
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<p><strong>Reference numbers:</strong> Up to 123× over CPU; 21× on RTX 3070; cuFFT-comparable kernel structure.</p>
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<p><strong>Wire:</strong> <code>(ntt (mod . p) (omega . root) (xs . blob<N×8B>))</code> → <code>blob<N×8B></code></p>
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<p><strong>Refs:</strong> <a href="https://arxiv.org/pdf/2405.11353">NTTSuite</a> · <a href="https://eprint.iacr.org/2021/124.pdf">FHE NTT</a></p>
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<h4>G. <code>cuda-radix-sort</code> / <code>cuda-prefix-scan</code> — reduction primitives</h4>
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<p><strong>Reference numbers:</strong> 1.4 G keys/sec on Titan; 20–50× over CPU merge sort; 257× over Intel Xeon Phi for scan.</p>
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<p><strong>Wire:</strong> <code>(sort-u64 (xs . blob<N×8B>))</code> → <code>blob<N×8B></code></p>
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<p><strong>Refs:</strong> <a href="https://github.com/NVIDIA/cub">NVIDIA CUB</a> · <a href="https://gpuopen.com/learn/boosting_gpu_radix_sort/">Onesweep</a></p>
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<table>
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<thead><tr><th>form</th><th>throughput</th><th>hardware</th><th>ref</th></tr></thead>
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<tbody>
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<tr><td><code>cuda-secp256k1-batched-mul</code></td><td>6.5 Gkeys/s VanitySearch RTX 4090; 8.6 Gkeys/s RTX 5090; 2.65 Gkeys/s RTX 3080</td><td>(promoted — see Live)</td><td><a href="https://arxiv.org/pdf/2501.03245">gECC</a> · <a href="https://github.com/FixedPaul/VanitySearch-Bitcrack">Bitcrack</a></td></tr>
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<tr><td><code>cuda-bignum-cgbn</code></td><td>100×+ on dense mul vs Xeon-20c + GMP + OpenMP</td><td>V100</td><td><a href="https://github.com/NVlabs/CGBN">NVlabs CGBN</a> · <a href="https://arxiv.org/pdf/2405.14642">midsize-int</a></td></tr>
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<tr><td><code>cuda-rho-pollard-walk</code></td><td>87.7 M ops/sec for ECCp79</td><td>RTX 2070 Super</td><td><a href="https://github.com/atlomak/CUDA-rho-pollard">atlomak</a> · <a href="https://github.com/oritwoen/kangaroo">oritwoen</a></td></tr>
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<tr><td><code>cuda-clifford-stabilizer</code></td><td>186× over Stim (CPU SOTA) on equivalence-checking</td><td>STABSim</td><td><a href="https://arxiv.org/abs/2507.03092">STABSim</a> · <a href="https://arxiv.org/abs/2505.03307">Qimax</a></td></tr>
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<tr><td><code>cuda-bernstein-yang-inv</code></td><td>3–10× per inversion over Fermat on CPU; novel territory on GPU</td><td>—</td><td><a href="https://eprint.iacr.org/2019/266">safegcd</a> · <a href="https://eprint.iacr.org/2024/644">Jumping</a></td></tr>
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<tr><td><code>cuda-ntt-poly</code></td><td>up to 123× over CPU; 21× on RTX 3070</td><td>RTX 3070</td><td><a href="https://arxiv.org/pdf/2405.11353">NTTSuite</a> · <a href="https://eprint.iacr.org/2021/124.pdf">FHE NTT</a></td></tr>
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<tr><td><code>cuda-radix-sort</code></td><td>1.4 G keys/sec; 20–50× over CPU merge sort; 257× vs Xeon Phi for scan</td><td>Titan</td><td><a href="https://github.com/NVIDIA/cub">CUB</a> · <a href="https://gpuopen.com/learn/boosting_gpu_radix_sort/">Onesweep</a></td></tr>
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</tbody>
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</table>
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<h3>Surveyed forms (Wave 2)</h3>
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<p>Sorted by reported speedup descending.</p>
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