diff --git a/c/jit.h b/c/jit.h
new file mode 100644
index 0000000..f464162
--- /dev/null
+++ b/c/jit.h
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+/*
+ * jit.h — x86_64 JIT compiler for uncommonlisp
+ *
+ * Compiles Scheme procedures to native machine code.
+ * Uses mmap(PROT_READ|PROT_WRITE|PROT_EXEC) for executable memory.
+ *
+ * Code outlasts authors.
+ */
+#ifndef JIT_H
+#define JIT_H
+
+#include "uncommonlisp.h"
+
+/* A JIT-compiled function takes NaN-boxed Value args and returns a Value.
+ * System V AMD64 ABI: args in rdi, rsi, rdx, rcx, r8, r9 */
+typedef Value (*JitFunc)(Value, Value, Value, Value, Value, Value);
+
+/* Opaque handle to a JIT code block */
+typedef struct JitBlock {
+    void *code;       /* mmap'd executable memory */
+    size_t size;      /* allocated size */
+    JitFunc func;     /* entry point (same as code) */
+    const char *name; /* procedure name for debugging */
+} JitBlock;
+
+/* Try to JIT-compile a Proc. Returns NULL if the proc uses features
+ * we can't JIT (call/cc, macros, complex forms). */
+JitBlock *jit_compile(Proc *proc);
+
+/* Free a JIT code block */
+void jit_free(JitBlock *block);
+
+/* Global flag — enable JIT compilation */
+extern bool g_jit_enabled;
+
+#endif /* JIT_H */
diff --git a/docs/gpu-architecture.md b/docs/gpu-architecture.md
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index 0000000..79f90f4
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+++ b/docs/gpu-architecture.md
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+# GPU Lambda Execution — Architecture Notes
+
+## Path to Hyper-Lambdas
+
+### Phase 1: Map/Reduce on GPU (immediate)
+- `(map f list)` where f is pure → one CUDA thread per element
+- `(fold-left + 0 list)` → tree-based parallel reduction in shared memory
+- NaN-boxed values work natively as CUDA `uint64_t`
+- Pre-allocate memory pools (no malloc in kernels)
+
+### Phase 2: Trampolining for Recursive Lambdas
+- Convert recursive calls to thunks (unevaluated computations)
+- GPU kernel loops over thunks instead of recursing
+- Eliminates stack overflow risk on GPU
+- Each CUDA thread processes one thunk chain
+
+### Phase 3: Interaction Combinators (Bend/HVM approach)
+- Lambda terms → interaction net graphs
+- Rewrite agents in parallel across CUDA cores
+- 74,000 MIPS on RTX 4090 demonstrated by HVM2
+- Requires compilation to intermediate representation
+
+## Key Design Decisions
+- Keep NaN-boxing (native CUDA uint64_t)
+- Memory pools for cons cells (atomicDec on free list)
+- Closures as flat struct: {code_id, env_ptr, env_size}
+- Environments as flat arrays (better memory coalescing)
+- Warp size 32, block size 256, grid = (N+255)/256
+
+## References
+- Bend/HVM: github.com/HigherOrderCO/Bend
+- cl-cuda: github.com/takagi/cl-cuda
+- Harlan (Scheme→OpenCL): github.com/eholk/harlan
+- Futhark (functional GPU): futhark-lang.org